This invention relates to graphic accelerator interface devices for providing a video signal output for a computer system.
Computer systems having associated video displays are well known in the art. With the advent of the ability to produce high quality detailed colored graphics, graphic accelerator interface devices have been developed to speed the rendering of the color images which are displayed. It is known in the art to either incorporate such a graphic accelerator device into a computer system directly or to provide an add-in accelerator card that provides the video signal output for the computer system.
Graphic accelerator devices contain significant amounts of auxiliary memory that is used for the rendering of graphics. While a computer""s main CPU typically directs the overall display parameters for the video signal, independent graphic accelerator processors and memory perform many of the rendering tasks at high speeds so that the desired video signal is produced as quickly as possible without delay.
In order to facilitate the efficient production of a video signal, it is known to provide a sizeable frame buffer of multiple mega bytes, for example 64 mega bytes, on a graphics accelerator device which is accessible by the computer""s main CPU for os/applications and is used by the graphic accelerator""s processors as the basis for generating the video signal. Conventionally, the frame buffer is segmented into various blocks of data and the computer""s CPU is provided access to the frame buffer via a host data path within the video interface device to a specified number of blocks within the frame buffer at any given time. The various blocks of data accessible via the host data path by the main CPU are called surfaces and typically up to eight surfaces are accessible at any given time. The address identification of the particular surfaces, as defined in the host data path, are dynamically allocated so that the system CPU can gain access to the entire frame buffer, albeit only up to a predetermined number of surfaces, such as eight, at one time.
Conventionally, when the graphics driver needs to use the data stored in the frame buffer, it reads the specific data block and reprocesses the information as needed. In a variety of instances, the graphics driver may write data into various surfaces of the frame buffer to provide access thereto to the system CPU. CPU access is provided by the host data path assigning the surface which entails assigning the surface""s address location to one of several sets of comparators. Subsequent use of an assigned surface by the graphic processing circuitry conventionally requires various reinitializing processes.
In modern computer systems (such as those that employ the PC DOS operating system, PC windows system or the Macintosh operation system as examples), the graphics driver may employ a tiling format for the generated video signal, but will copy blocks of information in an untiled format to another area of the frame buffer which is required for CPU access. This entails storing the tiled format data, processing it to create an untiled version and then storing the untiled version in the frame buffer. When the frame buffer data is to be used by the graphics driver, it reads the frame buffer data stored in the untiled format and processes it into a tiled format which is stored for subsequent use. However, if the untiled format data has not been changed from the time it was originally stored in the frame buffer, the resultant tiled formatted data is the same as the original stored tiled format data from which the untiled formatted data was derived.
In computer systems employing MAC operating systems, the graphic accelerator circuitry writes synchronized data into the frame buffer. It is important that this data be synchronized between the CPU and graphic accelerator so that each device sees the same current (most recently written) data. When accessing the data from the frame buffer, the graphics accelerator will normally conduct a re-synchronizing process before use to ensure that the data is in fact the most recent. However, if the CPU has not changed the data in the format buffer which is to be reused by the graphics interface circuitry, re-synchronization is unnecessary.
Applicants have recognized that it would be desirable to devise an interface device where redundant initialization processes, such as reconverting data to a tiled format or re-synchronizing data, can be eliminated thereby reducing overall processing time.
A graphic accelerator interface device for a computer is provided which has graphic processing circuitry coupled to a video signal output. The graphic processing circuitry functions under control of graphics driver software to generate a video output signal. The graphics accelerator includes a frame buffer for storing blocks of data used by the graphics driver. Access to the frame buffer is provided for the computer""s main CPU for operating system (os) applications via a host data path within the graphic accelerator. External reads and writes to the frame buffer are conducted via the host data path.
The host data path includes a plurality of comparators, each assigned to a different surface. Each surface is defined by an address range corresponding to a block of data in the frame buffer. Since there can be many more surfaces then there are comparators, the comparators are dynamically assignable so that the entire frame buffer is accessible.
An access flag register is associated with the host data path, preferably having both read and write flags, each with clear and set states. A pair of flags being provided for each of the comparators. Thus, each surface assigned to a comparator has associated read and write flags. Whenever a read or a write occurs to one of the assigned surfaces via the host data path, the corresponding flag is set. Accordingly, by referencing the write flags in conjunction with accessing data in the frame buffer stored in the address range of an assigned surface, the graphics driver can determine whether the data has been changed. The graphics driver""s use of the data stored in an assigned surface in the frame buffer is controlled in two different manners depending upon whether the corresponding write flag is in its clear or set state.
In a modern computer environment, the graphics driver stores blocks of data in a tiled format surface for normal use. When an os/application requests data access, corresponding tiled data is locked from normal use, processed and written into a selected surface of the frame buffer in an untiled format. The untiled surface then becomes assigned for the os/application access via the host data path. The os/application accesses the untiled copy of the surface as it desires and then informs the graphics driver that it may unlock the tiled surface data when done. Whether the graphics driver uses the untiled frame buffer surface data when it unlocks the surface is dependent upon the state of corresponding write access flag. Where the write access flag of the assigned surface is clear, the untiled data in the selected surface is unchanged, and the graphics driver ignores the frame buffer surface data and unlocks and utilizes the previously stored tiled format data. If the write access flag is set, the graphics driver reads the untiled data stored in the assigned surface from the frame buffer, processes it into the requisite tiled format and stores the new tiled version for use in a conventional manner in place of the previously stored and locked tiled data. This untiled to tiled conversion may be done either using the CPU, or by specialized hardware within the graphics accelerator if available.
In the MAC operating system environment, the graphics driver stores synchronized data into selected surfaces of the frame buffer. When one of the surfaces is assigned for os/application access via the host data path, reaccess to the data by the graphics driver is then dependent upon the state of the corresponding write access flag. Where the write access flag is clear, the graphics driver accesses the data stored in the assigned surface of the frame buffer by directly using it. When the write access flag is set, the graphics driver accesses data stored in the assigned surface in the conventional manner, i.e. resynchronizing the data before use.
After the graphics driver resynchronizes the data in an assigned surface of the frame buffer, the write flag is cleared. This can be done by the graphics driver by simply changing the state of the write access flag or by reassigning the comparator to a new surface and reinitializing the flags associated with that comparator for a newly assigned surface.
Preferably, the graphic accelerator interface device is incorporated into an add-in card having a video output port as the device""s video signal output and edge card contacts as the card""s CPU input. However, the video accelerator interface device can be directly incorporated into the motherboard of a computer system. In either case, if the computer system has a built-in video display, the graphic accelerator video signal output can be directly coupled to such a display.
It is an object of the invention to provide a graphic accelerator interface device where redundant initialization processes, such as reconverting data to a tiled format or resynchronizing data, can be eliminated to thereby reduce overall processing time.